At our university you have to take courses in a subsidiary subject. My subsidiary subject was "electrical engineering". You are allowed to do an interdisciplinary project instead of taking an exam in your subsidiary subject.
I decided to do such a project, because I found a project which really interested me. I implemented an encryption chip in VHDL. VHDL is a programming language, and its main use is to describe integrated circuits. From this description you can guess that it is quite different in some aspects, compared to other high level languages (like for example C).
The project culminated in the configuration of a FPGA chip, which then contained the integrated circuit. We tested the FPGA on a logic simulator/analyser and it worked :-).
At the end of the project I noticed that the circuit could be still improved a lot (by using a clocked multiplier module to reduce size and then pipelining the circuit), but time ran out and I never realized the improvements.